ABOUT THE DIN

FPGA-Based Machine Learning Acceleration

CruxML

About the Company

CruxML delivers real-time solutions at the edge of the network through a fusion of reconfigurable computing, custom inference acceleration and low-precision deep neural networks. Its technology addresses problems in defence, space, natural resources and cyber security that depend on remote, autonomous and automated sensing and response — building IP and systems that solve challenges considered ‘too hard’ for conventional approaches.

Project Objective

This project will develop a fast, Band-of-Interest (BOI) detector implemented on an FPGA, supporting real-time radio frequency machine learning (RFML). BOI detection is a critical first stage in RFML pipelines, but software implementations suffer from unacceptable latency. The intern will design a low-latency detection algorithm and an initial FPGA implementation — a building block for RFML applications in intelligence, surveillance and reconnaissance (ISR) and electronic warfare (EW), including Automated Modulation Classification, RF Direction Finding and Specific Emitter Identification. The work will form part of an ASCA project in partnership with Visionary Machines and be commercialised through the project.

Project Tasks

• Weeks 1–6: Research wideband RFML BOI detection approaches; develop a detection algorithm; implement simulations in Python to evaluate accuracy, particularly under low signal-to-noise ratio conditions typical of ISR and EW applications.
• Weeks 7–11: Develop an initial, unoptimised FPGA implementation of the BOI detector in VHDL/Verilog; integrate into a GIT repository; validate against simulation outputs.
• Weeks 12–14 (or parallel throughout): Produce a final technical report documenting the algorithm, simulation results, FPGA implementation and recommendations for optimisation as part of the larger RFML system.

Intern Skills

• Digital signal processing — strong experience in DSP theory and Python-based implementation.
• FPGA design in Verilog; experience implementing signal processing algorithms in hardware.
• Python programming; ability to build simulations and evaluate algorithm accuracy.
• Fast learner who works well in a collaborative team environment; comfortable with daily supervisor interaction and structured milestone reviews.

How to apply

Eligible students (Australian citizens and permanent residents) apply via the online application form and submit a CV and motivation letter by 6 September 2026.